Hot Chips 2026: CUDA Targets RISC-V – By Chester Lam
chipsandcheese.com
August 24, 2026
5 min read
46/100
Summary
Nvidia is extending CUDA support toward RISC-V CPUs, potentially allowing server-class RISC-V systems to host Nvidia GPU compute workloads. CUDA currently supports x86-64 and AArch64 CPUs. Nvidia requires RISC-V systems to use the RVA23 profile and comply with RISC-V server SoC and platform specifications, which cover baseline reliability, availability, serviceability and security features. Nvidia also requires hardware features beyond those specifications, including vector extensions, PCIe cache coherency and peer-to-peer PCIe communication between devices. PCIe coherency prevents GPU DMA transfers from missing modified CPU-cache data or leaving CPUs with stale cached data after GPU writes. Without it, CUDA software would need explicit cache invalidation handling. Peer-to-peer PCIe support allows device-to-device buffer transfers without routing data through CPU memory. ACPI support was another initial obstacle, but the UEFI Forum added RISC-V ACPI support in 2025, and the ratified RISC-V Boot and Runtime Services specification includes ACPI. Nvidia said it is partnering with SiFive, which plans to demonstrate a CUDA-capable system at Hot Chips; the cited example specifications indicate a high-core-count server processor. Nvidia also described NVLink Fusion, which lets partners integrate Nvidia NVLink IP with custom CPUs or accelerators, including potential RISC-V designs, subject to CUDA requirements and support for frameworks such as DOCA and NCCL.
Key Takeaways
- Nvidia is targeting CUDA support for RISC-V CPUs, but its requirements are aimed at server-grade platforms rather than typical existing RISC-V consumer hardware.
- CUDA-capable RISC-V systems must support RVA23, server-platform specifications, PCIe coherency and peer-to-peer PCIe communication, according to Nvidia's stated requirements.
- The UEFI Forum added ACPI support for RISC-V in 2025, and the RISC-V Boot and Runtime Services specification includes ACPI.
- NVLink Fusion allows partners to integrate Nvidia NVLink IP with custom processors or accelerators, while requiring CUDA compatibility and support for software frameworks including DOCA and NCCL.
- Nvidia is partnering with SiFive on a planned Hot Chips demonstration of a CUDA-capable RISC-V system.
What the discussion said
The thread largely ignored the headline’s implication that CUDA has simply become portable to RISC-V. Its most substantive reading was narrower and more consequential: Nvidia appears to be specifying the hardware and system requirements a RISC-V machine must meet to participate in the CUDA ecosystem. Several readers treated that as potentially important because a vendor-backed server profile can become the practical standard that shapes future RISC-V datacenter designs, even without making the architecture broadly open or interchangeable. That possibility also triggered the thread’s central resistance. Critics argued that moving CUDA onto another instruction set does not cure CUDA’s defining problem: Nvidia still controls the programming model, its implementation, and much of the surrounding ecosystem. They pointed to Nvidia’s weak OpenCL experience, including avoidable feature gaps, as evidence that the company has incentives to preserve CUDA lock-in rather than offer genuinely equal support for open alternatives. A separate, terse complaint about needing more RAM suggests that accelerator memory capacity remains more urgent to some readers than another platform target. A linked RISC-V development system drew interest, but the unanswered question of when it ships underscored how early and uncertain the practical hardware story remains. The remaining remarks were jokes rather than analysis.
Where opinion split
The dispute is whether CUDA targeting RISC-V is progress for the architecture or merely Nvidia extending its moat. Supporters see a CUDA-capable server profile as a powerful way to make RISC-V credible in AI datacenters; critics say proprietary CUDA control means the new target inherits the same vendor dependence and neglect of open compute APIs.
Community Sentiment
Positives
- Nvidia defining a CUDA-ready RISC-V server profile could give fragmented RISC-V datacenter efforts a concrete target and accelerate credible AI server hardware.
Concerns
- CUDA on RISC-V still leaves developers inside Nvidia’s patented, mostly closed ecosystem, so an ISA change does little to deliver real AI software freedom.
- Nvidia’s history of making OpenCL less capable and less convenient than CUDA is cited as proof that open GPU-compute alternatives will remain second-class.
- For AI workloads hungry for model weights and context capacity, more memory is seen as a more pressing need than another CUDA host architecture.
